Simulation of deep level transient spectroscopy using circuit simulator with deep level trap model implemented by Verilog-A language

A modeling method of deep level transient spectroscopy (DLTS) using circuit simulation with a MOS capacitor compact model which takes into account influences of deep level traps is proposed. In the proposed method, DLTS measurement procedures are described by transient analysis of circuit simulation. Stable numerical convergence is obtained even for the case in which carrier traps with wide range of time scales are included. Through case studies, it is proved that this method is a robust and versatile theoretical tool to predict DLTS signals, which helps to understand DLTS results and to optimize DLTS measurement conditions. Furthermore, the method is applied to several capacitance measurement methods discussed in literatures concerning GaIN MIS capacitors, which ensures the practical ability of the proposed simulation approach.