Hierarchical interconnect modeling

被引：2

作者：

Chiprout, E ^{[1
]}

机构：

[1] IBM Corp, Div Res, Austin Res Lab, Austin, TX 78758 USA

来源：

INTERNATIONAL ELECTRON DEVICES MEETING - 1997, TECHNICAL DIGEST | 1997年

关键词：

D O I：

10.1109/IEDM.1997.649479

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Interconnect parasitics are competing with devices for impact on performance and therefore accurate interconnect modeling is called for. However fully accurate 3D modeling is not always necessary nor feasible and a hierarchical modeling approach is advocated. Electromagnetic models, transmission lines, and lumped elements can be incorporated as linear circuit elements, reduced, and simulated with device-level models.

引用

页码：125 / 128

页数：4