Fully-depleted FBC (Floating Body Cell) with enlarged signal window and excellent logic process compatibility

被引:19
作者
Shino, T [1 ]
Higashi, T [1 ]
Kusunoki, N [1 ]
Fujita, K [1 ]
Ohsawa, T [1 ]
Aoki, N [1 ]
Tanimoto, H [1 ]
Minami, Y [1 ]
Yamada, T [1 ]
Morikado, M [1 ]
Nakajima, H [1 ]
Inoh, K [1 ]
Hamamoto, T [1 ]
Nitayama, A [1 ]
机构
[1] Toshiba Co Ltd, SoC Res & Dev Ctr, Isogo Ku, Yokohama, Kanagawa 2358522, Japan
来源
IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST | 2004年
关键词
D O I
10.1109/IEDM.2004.1419132
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Fully-depleted (FD) Floating Body Cell on 55nm SOI featuring excellent logic process compatibility has been successfully developed. For the first time FD operation is reported through significant signal enlargement by negative substrate bias. Using standard salicide process and FD operation, high-density embedded memory on SOI is achievable.
引用
收藏
页码:281 / 284
页数:4
相关论文
共 2 条
[1]  
INOH K, 2003 S VLSI TECHN, P63
[2]  
SHINO, 2004 S VLSI TECHN, P132