A survey of hybrid techniques for functional verification

被引：35
作者：
Bhadra, Jayanta
Abadir, Magdy S.
Ray, Sandip
Wang, Li-C.
机构：
[1] Freescale Semicond, Austin, TX 78729 USA
[2] Univ Texas, Austin, TX 78712 USA
[3] Univ Calif Santa Barbara, Santa Barbara, CA 93106 USA
来源：
IEEE DESIGN & TEST OF COMPUTERS | 2007年 / 24卷 / 02期
基金：
美国国家科学基金会;
关键词：
D O I：
10.1109/MDT.2007.30
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
The increasing size and complexity of industry hardware designs, along with stringent time-to-market requirements, have put a heavy burden on verification to ensure that designs are relatively bug free. A general theme successfully adopted by academia and several vendors is to apply multiple verification techniques so that they complement one another, resulting in an increase of the verification tool's overall effectiveness. Such integration must be carried out delicately and precisely so that the overall technique becomes more than merely a sum of the techniques. This article surveys the research that has taken place in this area. © 2007 IEEE.
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收藏
页码：112 / 122
页数：11
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