HEPCloud: An FPGA-Based Multicore Processor for FV Somewhat Homomorphic Function Evaluation

被引:48
作者
Roy, Sujoy Sinha [1 ,2 ]
Jarvinen, Kimmo [3 ]
Vliegen, Jo [1 ,2 ]
Vercauteren, Frederik [1 ,2 ,4 ]
Verbauwhede, Ingrid [1 ,2 ]
机构
[1] KU Leuven ESAT COSIC, Kasteelpk Arenberg 10, B-3001 Leuven Heverlee, Belgium
[2] IMEC, Kasteelpk Arenberg 10, B-3001 Leuven Heverlee, Belgium
[3] Univ Helsinki, Dept Comp Sci, Gustaf Hallstromin Katu 2b, FI-00014 Helsinki, Finland
[4] Open Secur Res, FangDa Bldg 704,Kejinan 12th, Shenzhen 518000, Peoples R China
基金
芬兰科学院; 欧盟地平线“2020”;
关键词
Homomorphic encryption; FV; lattice-based cryptography; ring-LWE; polynomial multiplication; number theoretic transform; hardware implementation; LARGE-NUMBER MULTIPLIER; ENCRYPTION; KEY;
D O I
10.1109/TC.2018.2816640
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we present an FPGA based hardware accelerator 'HEPCloud' for homomorphic evaluations of medium depth functions which has applications in cloud computing. Our HEPCloud architecture supports the polynomial ring based homomorphic encryption scheme FV for a ring-LWE parameter set of dimension 2(15), modulus size 1,228-bit, and a standard deviation 50. This parameter-set offers a multiplicative depth 36 and at least 85 bit security. The processor of HEPCloud is composed of multiple parallel cores. To achieve fast computation time for such a large parameter-set, various optimizations in both algorithm and architecture levels are performed. For fast polynomial multiplications, we use CRT with NTT and achieve two dimensional parallelism in HEPCloud. We optimize the BRAM access, use a fast Barrett like polynomial reduction method, optimize the cost of CRT, and design a fast divide-and-round unit. Beside parallel processing, we apply pipelining strategy in several of the sequential building blocks to reduce the impact of sequential computations. Finally, we implement HEPCloud on a medium-size Xilinx Virtex 6 FPGA board ML605 board and measure its on-board performance. To store the ciphertexts during a homomorphic function evaluation, we use the large DDR3 memory of the ML605 board. Our FPGA-based implementation of HEPCloud computes a homomorphic multiplication in 26.67 s, of which the actual computation takes only 3.36 s and the rest is spent for off-chip memory access. It requires about 37,551 s to evaluate the SIMON-64/128 block cipher, but the per-block timing is only about 18 s because HEPCloud processes 2,048 blocks simultaneously. The results show that FPGA-based acceleration of homomorphic function evaluations is feasible, but fast memory interface is crucial for the performance.
引用
收藏
页码:1637 / 1650
页数:14
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