A 300-MHz 25-μA/Mb-leakage on-chip SRAM module featuring process-variation immunity and low-leakage-active mode for mobile-phone application processor

被引:28
作者
Yamaoka, M [1 ]
Shinozaki, Y
Maeda, N
Shimazaki, Y
Kato, K
Shimada, S
Yanagisawa, K
Osada, K
机构
[1] Hitachi Ltd, Syst LSI Res Dept, Cent Res Lab, Tokyo 1858601, Japan
[2] Hitachi ULSI Syst Ltd, Kyushu Dev Ctr, Fukuoka, Japan
[3] Renesas Technol Corp, Tokyo 1878588, Japan
关键词
application processor; cellular phone; low leakage; low power; SRAM;
D O I
10.1109/JSSC.2004.838014
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An on-chip 1-Mb SRAM suitable for embedding in the application processor used in mobile cellular phones was developped This SRAM supports three operating modes-high-speed active mode, low-leakage low-speed active mode, and standby mode-and uses a subdivisional power-line control (SPC) scheme. The combination of three operating modes and the SPC scheme realizes low-power operation under actual usage conditions. It operates at 300 MHz, with leakage of 25 muA/Mb in standby mode, and 50 muA/Mb at the low-leakage active mode. This SRAM also uses a self-bias write scheme that decreases of minimum operating voltage by about 100 mV.
引用
收藏
页码:186 / 194
页数:9
相关论文
共 5 条
[1]   A pico-joule class, 1 GHz, 32 KByte x 64b DSP SRAM with self reverse bias [J].
Bhavnagarwala, AJ ;
Kosonocky, SV ;
Immediato, M ;
Knebel, D ;
Haen, AM .
2003 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2003, :251-252
[2]   A resume-standby application processor for 3G cellular phones [J].
Kamei, T ;
Ishikawa, M ;
Hiraoka, T ;
Irita, T ;
Abe, M ;
Saito, Y ;
Tawara, Y ;
Ide, H ;
Furuyama, M ;
Tamaki, S ;
Yasu, Y ;
Shimazaki, Y ;
Yamaoka, M ;
Mizuno, H ;
Irie, N ;
Nishii, O ;
Arakawa, F ;
Hirose, K ;
Yoshioka, S ;
Hattori, T .
2004 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, DIGEST OF TECHNICAL PAPERS, 2004, 47 :336-337
[3]   A 90 nm low power 32K-byte embedded SRAM with gate leakage suppression circuit for mobile applications [J].
Nii, K ;
Tenoh, Y ;
Yoshizawa, T ;
Imaoka, S ;
Tsukamoto, Y ;
Yamagami, Y ;
Suzuki, T ;
Shibayama, A ;
Makino, H ;
Iwade, S .
2003 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2003, :247-250
[4]  
Osada K., 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177), P168, DOI 10.1109/ISSCC.2001.912589
[5]  
Osada K, 2003, ISSCC DIG TECH PAP I, V46, P302