45nm nMOSFET with metal gate on thin SiON driving 1150μA/μm and off-state of 10nA/μm

被引：16

作者：

Henson, K ^{[1
]}

Lander, RJP ^{[1
]}

Demand, M ^{[1
]}

Dachs, CJJ ^{[1
]}

Kaczer, B ^{[1
]}

Deweerd, W ^{[1
]}

Schram, T ^{[1
]}

Tokei, Z ^{[1
]}

Hooker, JC ^{[1
]}

Cubaynes, FN ^{[1
]}

Beckx, S ^{[1
]}

Boullart, W ^{[1
]}

Coenegrachts, B ^{[1
]}

Vertommen, J ^{[1
]}

Richard, O ^{[1
]}

Bender, H ^{[1
]}

Vandervorst, W ^{[1
]}

Kaiser, M ^{[1
]}

Everaert, JL ^{[1
]}

Jurczak, M ^{[1
]}

Biesemans, S ^{[1
]}

机构：

[1] IMEC, B-3001 Louvain, Belgium

来源：

IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST | 2004年

关键词：

D O I：

10.1109/IEDM.2004.1419312

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We demonstrate for the first time that nMOS devices with PVD TaN gate on 1.2nm EOT SiON can be fabricated with high drive currents. On state currents of 1150muA/mum (I-off < 10nA/mum) at 1.2V and 810muA/mum (I-off < 10nA/mum) at 1.0V are among the highest ever reported. The TaN metal gate electrode allows the Capacitance Equivalent Thickness (CET or Tox-inv) to be scaled by 0.4nm without increasing the gate leakage. A special metal etch stopping on 1.4nm EOT SiON has been developed resulting in gate stacks of similar reliability as poly gate electrodes. We also report on an implant into the metal gate electrode that reduces gate leakage and increases mobility.

引用

页码：851 / 854

页数：4

共 6 条

[1]

[Anonymous], 2003, IEEE INT ELECT DEVIC

[2]

ARNAUD F, S VLSI TECH, P10

[3]

Hornung B., 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407), P85, DOI 10.1109/VLSIT.2003.1221098

[4]

KEDZIERSKI J, 2003, IEDM, P441

[5]

Yang N., 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318), P453, DOI 10.1109/IEDM.1999.824191

[6]

Zhao S, 2004, 2004 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, P14

← 1 →