A Residue-to-Binary Converter for the Extended Four-Moduli Set {2n-1, 2n+1, 22n+1, 22n+p}

被引:13
作者
Hiasat, Ahmad [1 ]
机构
[1] Princess Sumaya Univ Technol, Dept Comp Engn, Amman 11941, Jordan
关键词
Chinese remainder theorem; computer arithmetic; residue number system; residue-to-binary converter; VLSI implementation; RNS REVERSE CONVERTERS; VLSI IMPLEMENTATION; MODULI SETS; DESIGN; 2(N+1)-1;
D O I
10.1109/TVLSI.2017.2681758
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This brief presents a residue-to-binary converter for the moduli set {2(n) - 1, 2(n) + 1, 2(2n) + 1, 2(2n+p)}, where n is a positive integer and 0 <= p <= n - 2. The converter consists of three simplified 4n-bit carry-save adders (CSAs) along with a modulo (2(4n) - 1) adder. The main contribution of this brief is reducing the requirements of the proposed CSA network, which has impacted the area, delay, power and energy. Compared with four-moduli and five-moduli sets that have the dynamic range 2v(2(4n) -1), where v = n or 2(n), the proposed converter resulted in the average area, delay, power, and energy reductions of 22.7%, 9.2%, 17.8%, and 24.5%, respectively. Moreover, the throughput rate per unit area has been improved by an average of 48.7%.
引用
收藏
页码:2188 / 2192
页数:5
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