EMULATING SPIKING NEURAL NETWORKS FOR EDGE DETECTION ON FPGA HARDWARE

被引:8
作者
Glackin, Brendan [1 ]
Harkin, Jitn [1 ]
McGinnity, Thomas M. [1 ]
Maguire, Liam P. [1 ]
Wu, Qingxiang [1 ]
机构
[1] Univ Ulster, Intelligent Syst Res Ctr, Derry BT48 7JL, North Ireland
来源
FPL: 2009 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS | 2009年
关键词
NEURONS;
D O I
10.1109/FPL.2009.5272339
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Spiking Neural Networks (SNNs) are an emerging computing paradigm that attempt to model the biological functions of the human brain. However, as networks approach the biological scale with significantly large numbers of neurons, software simulations face the problem of scalability and increasing computation times. Thus, numerous researchers have targeted hardware implementations in an attempt to more closely replicate the parallel processing capabilities of biological networks. Reconfigurable hardware is seen as a particularly viable platform for attempting to replicate to some degree the natural plasticity and flexibility of the human brain. This paper presents a scalable FPGA based implementation approach that facilitates the accelerated emulation of large-scale SNNs. The approach is validated using a SNN-based edge detection application where an order of magnitude speed performance increase was observed in comparison to a software equivalent implementation.
引用
收藏
页码:670 / 673
页数:4
相关论文
共 12 条
[1]  
FURBER S, 2008, IEEE WORLD C COMP IN
[2]  
Harkin J, 2008, I C FIELD PROG LOGIC, P482
[3]  
Hines ML, 2003, HDB BRAIN THEORY NEU, P769
[4]  
MAASS W, 2001, HDB BRAIN THEORY NEU
[5]   Challenges for large-scale implementations of spiking neural networks on FPGAs [J].
Maguire, L. P. ;
McGinnity, T. M. ;
Glackin, B. ;
Ghani, A. ;
Belatreche, A. ;
Harkin, J. .
NEUROCOMPUTING, 2007, 71 (1-3) :13-29
[6]   Expandable networks for neuromorphic chips [J].
Merolla, Paul A. ;
Arthur, John V. ;
Shi, Bertram E. ;
Boahen, Kwabena A. .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2007, 54 (02) :301-311
[7]  
*NALL, 2007, NT1070273
[8]  
PEARSON MJ, 2007, IEEE T NEURAL NETS, V18
[9]   Real-time computing platform for spiking neurons (RT-Spike) [J].
Ros, Eduardo ;
Ortigosa, Eva M. ;
Agis, Rodrigo ;
Carrillo, Richard ;
Arnold, Michael .
IEEE TRANSACTIONS ON NEURAL NETWORKS, 2006, 17 (04) :1050-1063
[10]  
Upegui A., 2005, MICROPROCESSORS MICR, V29