A 0.7-5.7 GHz Reconfigurable MIMO Receiver Architecture for Analog Spatial Notch Filtering Using Orthogonal Beamforming

被引:18
作者
Golabighezelahmad, Sajad [1 ]
Klumperink, Eric A. M. [1 ]
Nauta, Bram [1 ]
机构
[1] Univ Twente, IC Design Grp, Fac Elect Engn Math & Comp Sci, NL-7500 Enschede, Netherlands
基金
荷兰研究理事会;
关键词
Analog beamforming; interference rejection; multiple-input multiple-output (MIMO); receiver; software-defined radio; spatial filtering; vector modulator (VM); RADIO;
D O I
10.1109/JSSC.2020.3028811
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A highly reconfigurable direct-conversion softwaredefined multiple-input multiple-output (MIMO) receiver with four RF inputs and four I/Q baseband outputs is proposed. It allows for digital MIMO but also analog interference rejection by spatial notch filtering through four flexible and simultaneous orthogonal beams. A segmented constant-Gm vector modulator (VM) with improved interference tolerance and wide RF frequency range targeting the sub-6-GHz bands is proposed. It exploits current-domain beamforming before I-V conversion by transimpedance amplifiers. A 0.7-5.7-GHz 22-nm fully depleted silicon-on-insulator (FD-SOI) prototype chip achieves >29 dB spatial filtering for a single notch and an ultrawideband 20-dB notch suppression bandwidth of 2.3 GHz at broadside excitation at an local oscillator (LO) frequency of 2.5 GHz. In the notches, an IIP3 of +16 dBm and B1dB of -11.5 dBm at a 41-dB gain is achieved, improving IIP3 and B1dB by 35 and 27 dB, respectively, by spatial filtering. A single- element noise figure (NF) of 5.5-7 dB is achieved on the VM constellation corners, degrading about 2 dB on the points nearby the biggest circle fitting into a square constellation. However, sub-3-dB system NF is potentially achievable, taking into account up to 6-dB improvement by the four-element beamforming. Given both gain and phase control provided by the VM, spatial patterns with up to three independent nulls can be synthesized with the four-element antenna array. The chip of 0.52 mm2 active area consumes 77-139 mW at an LO-frequency of 0.7-5.7 GHz from a 0.8-V supply.
引用
收藏
页码:1527 / 1540
页数:14
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