An Efficient Parallel Instruction Execution Method for VLIW DSP

被引：0
|
作者：
Sun, Mengjun [1 ]
Shen, Zheng [2 ]
He, Hu [2 ]
机构：
[1] Peking Univ, Dept Microelect, Beijing, Peoples R China
[2] Tsinghua Univ, Inst Microelect, Tsinghua, Peoples R China
来源：
2009 IEEE 8TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS | 2009年
基金：
中国国家自然科学基金;
关键词：
VLIW (very long instruction word); DSP (digital signal processor); assembler;
D O I：
10.1109/ASICON.2009.5351602
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
LILY is a high performance VLIW DSP processor for multimedia applications, developed by Tsinghua University. The processor classifies the instructions, and determines whether the instructions should be issued in parallel according to the order of the instructions. Under this parallelism, LILY processor is capable of saving one bit of operation code in the condition of inserting very few no operation (NOP) instructions. In addition, it is needed to design a corresponding assembler to accommodate the above new parallelism, which aids LILY to complete the highly efficient method The evaluation results show satisfactory suitability of the processor for high performance applications, high code density, and small program code size.(1)
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页码：75 / +
页数：2
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