共 50 条
[1]
Andrieu F, 2005, 2005 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, P176
[2]
Ang KW, 2004, IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST, P1069
[3]
Auth C., 2008, 2008 Symposium on VLSI Technology, P128, DOI 10.1109/VLSIT.2008.4588589
[4]
Chen CH, 2004, 2004 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, P56
[5]
Chidambaram PR, 2004, 2004 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, P48
[8]
45nm SOICMOS technology with 3X hole mobility enhancement and asymmetric transistor for high performance CPU application
[J].
2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2,
2007,
:1035-1037
[9]
Low temperature (≤ 800°C) recessed junction selective silicon-germanium source/drain technology for sub-70 nm CMOS
[J].
INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST,
2000,
:437-440
[10]
GE CH, 2004, IEDM