Power management in circuits design

被引：0

作者：

Yang, Tianchi ^{[1
]}

Jin, Liang ^{[1
]}

Chen, Juan ^{[2
]}

机构：

[1] Natl Digital Switch Ctr, Zhengzhou, Peoples R China

[2] Dept Informat Sci, Zhengzhou, Peoples R China

来源：

2006 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS | 2006年

关键词：

power management; DPM; embedded operating system;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Proper power management mechanism is important when designing circuits. It is helpful to reduce power consumption and improve circuits' performance. This low power circuit model adopts five-layer architecture, which are hardware platform, driver layer, operating system, power manage mechanism and application program. Dynamic power management (DPM) technology is also introduced to solve the problem of power consumption. The experiment on embedded system demonstrates that this power management mechanism is feasible.

引用

页码：1757 / +

页数：2

共 6 条

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