A CMOS baseline holder (BLH) for readout ASICs

被引:72
作者
De Geronimo, G
O'Connor, P
Grosholz, J
机构
[1] Brookhaven Natl Lab, Instrumentat Div, Upton, NY 11973 USA
[2] EV Prod, Saxonburg, PA 16056 USA
关键词
D O I
10.1109/23.856523
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
As a result of a cooperation between Brookhaven National Laboratory and eV Products a generation of high performance readout ASICs was developed. One of the novel circuit solutions implemented in the ASICs is the baseline holder (BLH), a system which provides setting and stabilization of the output baseline both at low frequency and at high rate operation. The BLH is conceptually different from the baseline restorer (BLR). With a output peaking voltage 2V (10fC), a peaking time 400ns and a rate 500kHz, an asymptotic shift of the baseline < 8mV was measured in the periodic case. A resolution higher than 12 bit was found in the random arrival of pulses case.
引用
收藏
页码:818 / 822
页数:5
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