A new technique for IDDQ testing in nanometer technologies

被引：5

作者：

Tsiatouhas, Y

Moisiadis, Y

Haniotakis, T

Nikolos, D

Arapoyanni, A

机构：

[1] Integrated Syst Dev SA, Athens, Greece

[2] Univ Athens, Dept Informat & Telecommun, Athens, Greece

[3] So Illinois Univ, Dept Elect & Comp Engn, Carbondale, IL 62901 USA

[4] Univ Patras, Dept Comp Engn & Informat, Patras 26500, Greece

来源：

INTEGRATION-THE VLSI JOURNAL | 2002年 / 31卷 / 02期

关键词：

I-DDQ testing; current monitoring; design for testability;

D O I：

10.1016/S0167-9260(02)00023-8

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

I-DDQ testing has become a widely accepted defect detection technique in CMOS ICs. However, its effectiveness in very deep submicron technologies is threatened by the increased transistor leakage current. In this paper, we propose a technique for the elimination, during testing, of the normal leakage current from the sensing node of a circuit under test. In this way the already known in the open literature I-DDQ sensing techniques can be applied in the nanometer technologies. (C) 2002 Elsevier Science B.V. All rights reserved.

引用

页码：183 / 194

页数：12

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