A Modular Approximation Methodology for Efficient Fixed-Point Hardware Implementation of the Sigmoid Function

被引:21
作者
Pan, Zhe [1 ]
Gu, Zonghua [2 ]
Jiang, Xiaohong [1 ]
Zhu, Guoquan [3 ]
Ma, De [1 ]
机构
[1] Zhejiang Univ, Coll Comp Sci & Technol, Hangzhou 310058, Peoples R China
[2] Umea Univ, Dept Appl Phys & Elect, S-90187 Umea, Sweden
[3] Res Ctr Intelligent Comp Syst, Artificial Intelligence Res Inst, Zhejiang Lab, Hangzhou 310058, Peoples R China
基金
中国国家自然科学基金; 国家重点研发计划;
关键词
Hardware; Taylor series; Newton method; Approximation error; Artificial neural networks; Quantization (signal); Input variables; Artificial neural networks (NNs); FPGA; hardware acceleration; Newton-Raphson (NR) method; sigmoid function; NEURAL-NETWORK; PROCESSOR; DESIGN;
D O I
10.1109/TIE.2022.3146573
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The sigmoid function is a widely used nonlinear activation function in neural networks. In this article, we present a modular approximation methodology for efficient fixed-point hardware implementation of the sigmoid function. Our design consists of three modules: piecewise linear (PWL) approximation as the initial solution, Taylor series approximation of the exponential function, and Newton-Raphson method-based approximation as the final solution. Its modularity enables the designer to flexibly choose the most appropriate approximation method for each module separately. Performance evaluation results indicate that our work strikes an appropriate balance among the objectives of approximation accuracy, hardware resource utilization, and performance.
引用
收藏
页码:10694 / 10703
页数:10
相关论文
共 45 条
[1]   Piecewise linear approximation applied to nonlinear function of a neural network [J].
Amin, H ;
Curtis, KM ;
Hayes-Gill, BR .
IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS, 1997, 144 (06) :313-317
[2]  
Bak Stanley, 2021, ARXIV210900498
[3]   OCEAN: An On-Chip Incremental-Learning Enhanced Artificial Neural Network Processor With Multiple Gated-Recurrent-Unit Accelerators [J].
Chen, Chixiao ;
Ding, Hongwei ;
Peng, Huwan ;
Zhu, Haozhe ;
Wang, Yu ;
Shi, C-J Richard .
IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, 2018, 8 (03) :519-530
[4]   Efficient Hardware Implementation of DNN-Based Speech Enhancement Algorithm With Precise Sigmoid Activation Function [J].
Chiluveru, Samba Raju ;
Gyanendra ;
Chunarkar, Snehit ;
Tripathy, Manoj ;
Kaushik, Brajesh Kumar .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2021, 68 (11) :3461-3465
[5]  
Chung Junyoung, 2014, EMPIRICAL EVALUATION
[6]  
David R., 2020, arXiv
[7]  
Donahue J, 2015, PROC CVPR IEEE, P2625, DOI 10.1109/CVPR.2015.7298878
[8]   Weighting Factor Design in Model Predictive Control of Power Electronic Converters: An Artificial Neural Network Approach [J].
Dragicevic, Tomislav ;
Novak, Mateja .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2019, 66 (11) :8870-8880
[9]  
Dubey S. R., 2021, ARXIV210914545
[10]  
en.wikipedia.org, Q NUMBER FORMAT