Design and performance evaluation of a Programmable Packet Processing Engine (PPE) suitable for high-speed network processors units

被引:5
作者
Vlachos, K. [1 ]
Orphanoudakis, T.
Papaeftathiou, Y.
Nikolaou, N.
Pnevmatikatos, D.
Konstantoulakis, G.
Sanchez, J. A.
机构
[1] Univ Patras, Comp Engn & Informat Dept, GR-26500 Patras, Greece
[2] Tech Univ Crete, Dept Elect & Comp Engn, Khania 73100, Greece
[3] Ellemedia Technol, GR-17121 Athens, Greece
[4] InAccess Networks, GR-17672 Athens, Greece
[5] Greek Res & Technol Network, GR-11527 Athens, Greece
关键词
embedded networking systems; network processor; special-purpose processor;
D O I
10.1016/j.micpro.2006.09.001
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we present a Programmable Packet Processing Engine suitable for deep header processing in high-speed networking systems. The engine, which has been - fabricated as part of a complete network processor, consists of a typical RISC-CPU, whose register file has been modified in order to support efficient context switching, and two simple special-purpose processing units. The engine can be used in a number of network processing units (NPUs), as an alternative to the typical design practice of employing a large number of simple general purpose processors, or in any other embedded system designed to process mainly network protocols. To assess the performance of the engine, we have profiled typical networking applications and a series of experiments were carried out. Further, we have compared the performance of our processing engine to that of two widely used NPUs and show that our proposed packet-processing engine can run specific applications up to three times faster. Moreover, the engine is simpler to be fabricated, less complex in terms of hardware complexity, while it can still be very easily programmed. (c) 2006 Elsevier B.V. All rights reserved.
引用
收藏
页码:188 / 199
页数:12
相关论文
共 20 条
  • [1] BLAKE S, 1998, RFC, V2475
  • [2] Technologies and building blocks for fast packet forwarding
    Bux, W
    Denzel, WE
    Engbersen, T
    Herkersdorf, A
    Luijten, RP
    [J]. IEEE COMMUNICATIONS MAGAZINE, 2001, 39 (01) : 70 - 77
  • [3] *CISC INC, 2001, CISCS TOAST 2 CHIP R
  • [4] *EZCH TECHN, NETW PROC DES NEXT G
  • [5] FINCH B, 2003, SYST CHIP ASIC DES C
  • [6] HEINANEN J, 1999, RFC, V2697
  • [7] HYPERSTONE AG, E132XR RISC DSP
  • [8] *INT CORP, INT IXP 1200 NETW PR
  • [9] LAKSHMANAMURTHY S, 2002, INT TECHNOLOGY J
  • [10] NetBench: A benchmarking suite for network processors
    Memik, G
    Mangione-Smith, WH
    Hu, WD
    [J]. ICCAD 2001: IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, DIGEST OF TECHNICAL PAPERS, 2001, : 39 - 42