Systems engineering and design of high-tech factories

被引：4

作者：

McGinnis, Leon F. ^{[1
]}

Huang, Edward ^{[1
]}

Wu, Kan ^{[1
]}

机构：

[1] Georgia Inst Technol, Sch Ind & Syst Engn, Atlanta, GA 30332 USA

来源：

PROCEEDINGS OF THE 2006 WINTER SIMULATION CONFERENCE, VOLS 1-5 | 2006年

关键词：

D O I：

10.1109/WSC.2006.322969

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

Contemporary technology for Product Lifecycle Management (PLM) integrates computer aided design (CAD) and engineering analysis (CAE) to support rapid, distributed, team-oriented product data development and management, including high fidelity simulation on demand.. This technology potentially provides a platform for creating a new generation of factory design tools which enable "on demand" simulation and analytic model results to be used by factory designers. This paper describes the opportunity, and provides an illustration in the context of semiconductor wafer fab design.

引用

页码：1880 / +

页数：3

共 23 条

[1] As good as it gets: Optimal fab design and deployment [J].

Benavides, DL ;

Duley, JR ;

Johnson, BE .

IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 1999, 12 (03) :281-287

[2] Automation and fab concepts for 300 mm wafer manufacturing [J].

Binder, H ;

Honold, A .

MICROELECTRONIC ENGINEERING, 1999, 45 (2-3) :91-100

[3]

BOTTOMS WR, 1983, SOLID STATE TECHNOL, V26, P173

[4]

CASTRUCCI P, 1995, IEEE CPMT INT EL MAN

[5]

CHEN JC, 1997, IEEE INT S SEM MAN

[6]

Colvin T. D., 1998, European Semiconductor, V20, P25

[7]

COLVIN TD, 1999, MODUFAB DESIGN CONCE

[8]

COLVIN TD, 1999, QUANTITATIVE APPROAC

[9] Using an optimized queueing network model to support wafer fab design [J].

Hopp, WJ ;

Spearman, ML ;

Chayet, S ;

Donohue, KL ;

Gel, ES .

IIE TRANSACTIONS, 2002, 34 (02) :119-130

[10]

Hunter R., 2003, Semiconductor International, V26, P60

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