Advanced methods for analysis of lot-to-lot yield variation

An automated system for analyzing lot-to-lot yield variation has been developed and implemented at AMD's Submicron Development Center (SDC). The automated nature of data preparation and analysis provided an efficient and accurate means to identify process excursions and sub-par processing tools. The signal detection capability of this system has been greatly enhanced by advanced features such as interaction and spatial analyses. Furthermore, its link to the inline defect monitor and the wafer-position-tracking system (WPT) added to the robustness of the system. Quick and accurate identification of process variations has led to tightening of the yield distribution and thus increased die output.