An integrated model for the study of flicker compensation in electrical networks

被引:14
作者
Alves, Mario Fabiano [1 ]
Assis Peixoto, Zelia Myriam [1 ]
Garcia, Celso Peixoto [2 ]
Gomes, Deilton Goncalves [3 ]
机构
[1] Pontificia Univ Catolica Minas Gerais, BR-30535610 Belo Horizonte, MG, Brazil
[2] Ctr Univ UNA, BR-30494310 Belo Horizonte, MG, Brazil
[3] Ctr Fed Educ Tecnol Minas Gerais, Leopoldina, MG, Brazil
关键词
Arc furnace; Voltage flicker; Chaotic model; Static var compensator; SVC;
D O I
10.1016/j.epsr.2010.04.014
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents an integrated model for the simulation of the voltage flicker introduced to a power system due to an arc furnace operation. The model was developed for power system planning purpose in the ATP computational environment. It can be adjusted to the desired operation conditions so as to correctly simulate the furnace operation stages (melting or refining stage) and the expected furnace's degree of flicker severity, for each particular arc furnace and power system combination. Chua's oscillator circuit is used to achieve the chaotic nature behavior of the arc voltage and a Static Var Compensator (SVC) is used for flicker compensation. Modeling and simulation of the full package, including an IEC flickermeter used to evaluate flicker severity, are presented. (C) 2010 Elsevier B.V. All rights reserved.
引用
收藏
页码:1299 / 1305
页数:7
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