Reducing Lead-free Soldering Failures Caused by Printed Circuit Board Shrinkage

被引：0

作者：

Geczy, A. ^{[1
]}

Tersztyanszky, L. ^{[2
]}

Illes, B. ^{[1
]}

Kemler, A. ^{[2
]}

Szabo, A. ^{[2
]}

机构：

[1] Budapest Univ Technol & Econ, Dept Elect Technol, Budapest Egry J U 18 V1, H-1111 Budapest, Hungary

[2] MSE2 E, Robert Bosch Kft, H-3000 Robert Bosch, Hungary

来源：

2013 IEEE 19TH INTERNATIONAL SYMPOSIUM FOR DESIGN AND TECHNOLOGY IN ELECTRONIC PACKAGING (SIITME) | 2013年

关键词：

Printed circuit board; shrinkage; tombstone; bridging; automotive electronics;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The paper presents a novel approach on an emerging problem in lead-free reflow soldering technology. The trend of miniaturized SMD device application and the increasing component density cause newfound problems during the reflow process. In this work, the issue of Printed Circuit Board (PCB) shrinkage is inspected in the environment of automotive electronics production. The shrinkage effect results in linear offset on the double sided PCB along the (XY) dimensions during stencil printing of the second reflow pass. The observed phenomenon causes tombstone and bridging failures on specific fine-pitch SMD components. To investigate and obtain deeper understanding of the phenomenon, a new method was developed for the measurement of shrinkage. The novel measurement method is evaluated with a less-productive, but more precise measurement device. With the collected data it is possible to approximate the overall shrinkage of the given product. After introducing a compensation step on the stencil design (based on the measurements), it is possible to significantly reduce the quantity of failures caused by the shrinkage.

引用

页码：65 / 68

页数：4