A High-Performance and Low-Cost Montgomery Modular Multiplication Based on Redundant Binary Representation

被引:12
|
作者
Li, Bing [1 ]
Wang, Jinlei [1 ]
Ding, Guocheng [2 ]
Fu, Haisheng [1 ]
Lei, Bingjie [1 ]
Yang, Haitao [2 ]
Bi, Jiangang [3 ]
Lei, Shaochong [1 ]
机构
[1] Xi An Jiao Tong Univ, Inst Microelect, Xian 710000, Peoples R China
[2] State Grid Anhui Elect Power Co Ltd, Elect Power Res Inst, Hefei 230601, Peoples R China
[3] China Elect Power Res Inst, Dept High Voltage Technol, Beijing 100000, Peoples R China
关键词
Hardware; Adders; Circuits and systems; Delays; Elliptic curve cryptography; Power systems; Parallel processing; Montgomery modular multiplication; redundant binary representation; RSA; ECC; ASIC;
D O I
10.1109/TCSII.2021.3053630
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this brief, Redundant Binary Representation (RBR) is applied in Montgomery modular multiplication (MMM) to eliminate the long carry chain and realize parallel computation. A novel MMM algorithm based on RBR is proposed. Based on the proposed algorithm, different sizes of high-performance and low-cost Montgomery multipliers are implemented in TSMC CMOS process technology. The experimental results demonstrate that our design has significant advantages in terms of performance, area and Area-Time-Product over previous researches. It's worth mentioning that our 8192-bit Montgomery multiplier (TMSC 65nm) with 603MHz working frequency and 878.1K equivalent gates can complete the MMM in only 3403ns.
引用
收藏
页码:2660 / 2664
页数:5
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