Sub-30nm strained p-channel fin-type field-effect transistors with condensed SiGe source/drain stressors

被引:7
|
作者
Tan, Kian-Ming [1 ]
Liow, Tsung-Yang
Lee, Rinus T. P.
Chui, King-Jien
Tung, Chih-Hang
Balasubramanian, N.
Samudra, Ganesh S.
Yoo, Won-Jong
Yeo, Yee-Chia
机构
[1] Natl Univ Singapore, Dept Elect & Comp Engn, Silicon Nano Device Lab, Singapore 117576, Singapore
[2] Inst Microelect, Singapore 117685, Singapore
来源
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | 2007年 / 46卷 / 4B期
关键词
FinFET; condensed; SiGe; strained; embedded; source/drain;
D O I
10.1143/JJAP.46.2058
中图分类号
O59 [应用物理学];
学科分类号
摘要
Strained p-channel fin-type field-effect transistors (FinFETs) with SiGe source and drain (S/D) regions formed by a Ge condensation process is demonstrated. SiGe epitaxial layer was grown on the sidewalls at the S/D regions after a successful removal of both the polysilicon gate and nitride spacer stringer. Condensation of the SiGe at the S/D region was subsequently performed. The novel local Ge condensation not only drives Ge into the Si fin and/or increases the Ge concentration in the S/D regions for enhanced strain effects, but also eliminates the need for S/D recess etch, leading to process simplicity. Compared to a FinFET with uncondensed Si1-xGex S/D, FinFETs with condensed Si1-yGey S/D exhibit 28% higher drive current. Devices with gate lengths down to 26 nm were demonstrated with excellent control of short-channel effects.
引用
收藏
页码:2058 / 2061
页数:4
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