Small Size Class AB Amplifier For Energy Harvesting With Ultra Low Power, High Gain, and High CMRR

被引:0
作者
Far, Ali [1 ,2 ,3 ,4 ,5 ,6 ,7 ,8 ,9 ]
机构
[1] SFSU, MA Philosophy, San Francisco, CA 94132 USA
[2] Plantronics, Santa Cruz, CA USA
[3] PMI, ADI, Santa Clara, CA USA
[4] MPS, Exar, Fremont, CA USA
[5] MVT, Creat Labs, Design, Los Angeles, CA USA
[6] TelCom, Microchip, Design, Chandler, AZ USA
[7] Prudential Secur, New York, NY USA
[8] Galleon, New York, NY USA
[9] Spherix, New York, NY USA
来源
2016 IEEE INTERNATIONAL AUTUMN MEETING ON POWER, ELECTRONICS AND COMPUTING (ROPEC) | 2016年
关键词
cascode; regulated cascode; transconductance; amplifier; class AB; buffer; push pull; rail to rail; sink source; folded cascode amplifier; enhanced gain; current mirror; current source; high speed; fast; low power; low current; low voltage; subthreshold; RFID; internet of things; IoT; energy harvesting; solar harvesting; wearable electronics; biometrics; bioelectronics; sensor array; wireless sensor network; smart sensor array; WSN; SSA; batteryless; resistorless; analog; mixed-signal; IC; DESIGN TECHNIQUES; CMOS;
D O I
暂无
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
A low cost, high gain, and ultra low power rail-to-rail input-output amplifier based in 0.18 micron CMOS is presented, whose size is similar to 77 um per side. This work's incremental contributions are: First, a small and simple regulated cascode current mirror (RGC) is presented that is composed of a common source amplifier coupled with a diode connected self-cascode (SC). This RGC is incorporated in a standard folded cascode amplifier to boost its gain and modestly increase its high impedance output's operating head room, which is beneficial in the sub 1V power supply (VDD) environments. Second, amplifier's inputs can span to the rails via using two pairs of differential PMOSFETs in parallel, where the secondary pair is DC level shifted by NMOSFETs. As the amplifier's inputs span the rails, a single FET steers the same tail current between the amplifier's primary and secondary input PMOSFET pairs, thereby keeping its transconductance almost constant, considering that the amplifier operates in subthreshold. Montecarlo (MC) and worst case (WC) simulations indicate the following specifications are achievable: VDD minimum similar to 0.8v; I-DD similar to 260nA; input range rail to rail; offset voltage similar to 5mV; output range similar to 25mV from the rails; open loop gain (Av) similar to 138dB with unity gain bandwidth (fu) similar to 2MHz and phase margin (PM) similar to 30 degrees; power supply rejection ratio (PSRR) similar to -120dB; common mode rejection ratio (CMRR) similar to -140dB; slew rate (SR) similar to 1V/uS; settling time (ts) similar to 3uS.
引用
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页数:5
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