Development of high-current 4H-SiC ACCUFET

Planar 4H-SiC accumulation channel field-effect transistor (ACCUFET) have been designed, fabricated, and characterized. Detailed design and processing experiments were conducted on relatively large area ACCUFETs to boost their power ratings. A detailed two-dimensional (2-D) simulation design suggests that the. optimum spacing between two. adjacent P+ regions is approximately 4 mum. A-novel process with epitaxial regrowth over ion implanteIt p+ base region was developed to achieve a high accumulation layer mobility. Process splits from, e nitrogen-rich post gate oxidation anneals revealed that the lowest on-resistance and optimum threshold voltage were obtained from N2O annealed samples. 550 V blocking voltage with 22 mOmega-cm(2), were demonstrated on 2 A 4H-SiC-ACCUFETs. Using a newly developed hex-gate design, larger, 20 A 4H-SiC ACCUFETs are presented here with stable high temperature characteristics. In, these high-current devices, the threshold voltage decreases linearly from 1.5 V to 0.9 V, while the extracted channel mobility increases from 18 cm(2)/V-s to 33.6 cm(2)/V-s as the operating temperature is increased from 30 degreesC to 200 degreesC.