Overview and Outlook of Three-Dimensional Integrated Circuit Packaging, Three-Dimensional Si Integration, and Three-Dimensional Integrated Circuit Integration

被引:88
作者
Lau, John H. [1 ]
机构
[1] ASM Pacific Technol, Kwai Chung, Hong Kong, Peoples R China
关键词
THROUGH-SILICON VIAS; FINE-PITCH; BUMPLESS INTERCONNECT; CU ELECTRODES; WAFER; TSV; RELIABILITY; SYSTEM; SOLDER;
D O I
10.1115/1.4028629
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
3D integration consists of 3D integrated circuit (IC) packaging, 3D Si integration, and 3D IC integration. They are different and in general the through-silicon via (TSV) separates 3D IC packaging from 3D Si/IC integrations since the latter two use TSV but 3D IC packaging does not. 3D Si integration and 3D IC integration are different. 3D IC integration stacks up the thin chips with TSV and microbump, while 3D Si integration stacks up thin wafers with TSV alone (i.e., bumpless). TSV is the heart of 3D Si/IC integrations and is the focus of this investigation. Also, the state-of-the-art, challenge, and trend of 3D integration will be presented and examined. Furthermore, supply chain readiness for high volume manufacturing (HVM) of TSVs is discussed.
引用
收藏
页数:15
相关论文
共 150 条
[1]   Cu/Sn Microbumps Interconnect for 3D TSV Chip Stacking [J].
Agarwal, Rahul ;
Zhang, Wenqi ;
Limaye, Paresh ;
Labie, Riet ;
Dimcic, Biljana ;
Phommahaxay, Alain ;
Soussan, Philippe .
2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2010, :858-863
[2]   3-DIMENSIONAL IC TRENDS [J].
AKASAKA, Y .
PROCEEDINGS OF THE IEEE, 1986, 74 (12) :1703-1714
[3]  
Akasaka Y., 1986, International Electron Devices Meeting 1986. Technical Digest (Cat. No.86CH2381-2), P488
[4]   TSV Stress Testing and Modeling [J].
Amagai, Masazumi ;
Suzuki, Yutaka .
2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2010, :1273-1280
[5]   Fabrication and characterization of robust through-silicon vias for silicon-carrier applications [J].
Andry, P. S. ;
Tsang, C. K. ;
Webb, B. C. ;
Sprogis, E. J. ;
Wright, S. L. ;
Dang, B. ;
Manzer, D. G. .
IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 2008, 52 (06) :571-581
[6]  
[Anonymous], SYSTEM PACKAGE MINIA
[7]  
[Anonymous], 2013, PROC INT S MICROELEC
[8]  
[Anonymous], 1965, Electronics
[9]  
[Anonymous], 2014, CHIP SCALE REV
[10]  
[Anonymous], 2010, IEDM DEC, DOI DOI 10.1109/IEDM.2010.5703479