ARMed SPHINCS Computing a 41 KB Signature in 16 KB of RAM

被引：37
作者：
Huelsing, Andreas [1 ]
Rijneveld, Joost [2 ]
Schwabe, Peter [2 ]
机构：
[1] Tech Univ Eindhoven, Dept Math & Comp Sci, POB 513, NL-5600 MB Eindhoven, Netherlands
[2] Radboud Univ Nijmegen, Digital Secur Grp, POB 9010, NL-6500 GL Nijmegen, Netherlands
来源：
PUBLIC-KEY CRYPTOGRAPHY - PKC 2016, PT I | 2016年 / 9614卷
关键词：
Post-quantum cryptography; Hash-based signature schemes; Microcontroller; Resource-constrained devices; ARM Cortex M3; SPHINCS-256; XMSSMT;
D O I：
10.1007/978-3-662-49384-7_17
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper shows that it is feasible to implement the stateless hash-based signature scheme SPHINCS-256 on an embedded microprocessor with memory even smaller than a signature and limited computing power. We demonstrate that it is possible to generate and verify the 41 KB signature on an ARM Cortex M3 that only has 16 KB of memory available. We provide benchmarks for our implementation which show that this can be used in practice. To analyze the costs of using the stateless SPHINCS scheme instead of its stateful alternatives, we also implement XMSSMT on this platform and give a comparison.
引用
收藏
页码：446 / 470
页数：25
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