ASYNCHRONOUS IMPLEMENTATION OF RIJNDAEL ALGORITHM'S MIXCOLUMN AND INVMIXCOLUMN FUNCTIONS

This article presents the results of an asynchronous implementation of Rijndael Algorithm MixColumn and InvMixColumn transformation functions in FPGA(Field Programmable Gate Array. The methodology used for implementing asynchronous circuits is provided by the tool known as Balsa, which allows description, synthesis, and asynchronous functional simulation of digital circuits. Results are presented by comparing area and performance of two different architectures, which execute both encryption and decryption processes. The first architecture deploys the functions without optimization, whereas the second one executes encryption and decryption processes utilizing shared hardware resources for the two functions. The codification protocols, dual-rail and 1-of-4, are implemented in all asynchronous transformations.