A novel low-voltage 2nd-order sigma-delta modulator with double-sampling for GSM/DECT/WCDMA

被引：0
|
作者：
Chio, KS [1 ]
Martins, RP [1 ]
Sengpan, U [1 ]
机构：
[1] Univ Macau, Fac Sci & Technol, Taipa 840542, Macao, Peoples R China
来源：
2004 INTERNATIONAL CONFERENCE ON COMMUNICATION, CIRCUITS, AND SYSTEMS, VOLS 1 AND 2: VOL 1: COMMUNICATION THEORY AND SYSTEMS - VOL 2: SIGNAL PROCESSING, CIRCUITS AND SYSTEMS | 2004年
关键词：
sigma delta; double-sampling; RDWA; moving sum;
D O I：
10.1109/ICCCAS.2004.1346378
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents the design of a double-sampling multilevel Sigma-Delta Modulator (SDM), with relaxed opamp requirements, for GSM/DECT/WCDMA communication standards. The medulator operates with 1.8V voltage supply (with chopper stabilization technique) and has been implemented in 0.35mum CMOS. A novel dynamic element matching (DEM) technique is introduced for double-sampling SDM. The moving sum effect resulting from the fully floating switched-capacitor integrator in the feedback path has been reduced in order that the noise shaping performance remains unchanged in the signal band. The achieved SNR's are 88dB/70dB/55dB for GSM/DECT/WCDMA, respectively.
引用
收藏
页码：1146 / 1150
页数：5
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