A Fault Tolerant Approach for Application-Specific Network-on-Chip

被引:0
作者
Khoroush, Somayeh [1 ]
Reshadi, Midia [1 ]
机构
[1] Islamic Azad Univ, Sci & Res Branch, Dept Comp Engn, Tehran, Iran
来源
2013 NORCHIP | 2013年
关键词
Network on Chip; fault tolerant; routing; reliability;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a fault tolerant method is proposed for application specific Network on Chip. The goal of this paper is to determine a replacement path when faults occur on network links. Selecting criteria for the replacement path is choosing minimal path with the least congestion. In the proposed method, a decision tree structure is employed and a method for calculating Network on Chip reliability is introduced to improve the reliability of the fault tolerant Network on Chip and traffic distribution is, thus, improved and the effect of the presented design on yield. This technique is applicable for any topology and routing algorithms and ensures that, even if the links are faulty, the network will not be deadlocked and the system will continue to work properly.
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页数:6
相关论文
共 13 条
[1]  
DEMICHELI G, 2006, NETWORKS ON CHIPS TE
[2]  
Duato J., 2003, Interconnection networks
[3]   A 5-GHz mesh interconnect for a teraflops processor [J].
Hoskote, Yatin ;
Vangal, Sriram ;
Singh, Arvind ;
Borkar, Nitin ;
Borkar, Shekhar .
IEEE MICRO, 2007, 27 (05) :51-61
[4]  
Jerger Natalie Enright, 2009, SYNTHESIS LECT COMPU, V4, P1, DOI DOI 10.2200/S00209ED1V01Y200907CAC008
[5]   Bandwidth-constrained mapping of cores onto NoC architectures [J].
Murali, S ;
De Micheli, G .
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, 2004, :896-901
[6]   Reliability in application specific mesh-based NoC architectures [J].
Refan, Fatemeh ;
Alemzadeh, Homa ;
Safari, Saeed ;
Prinetto, Paolo ;
Navabi, Zainalabedin .
14TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, PROCEEDINGS, 2008, :207-+
[7]   Elixir: A new bandwidth-constrained mapping for Networks-on-chip [J].
Reshadi, Midia ;
Khademzadeh, Ahmad ;
Reza, Akram .
IEICE ELECTRONICS EXPRESS, 2010, 7 (02) :73-79
[8]   Efficient implementation of distributed routing algorithms for NoCs [J].
Rodrigo, S. ;
Medardoni, S. ;
Flich, J. ;
Bertozzi, D. ;
Duato, J. .
IET COMPUTERS AND DIGITAL TECHNIQUES, 2009, 3 (05) :460-475
[9]  
RODRIGO S, 2011, COMPUT AIDED DESIGN, V30, P534
[10]  
SHAMSHIRI S, 2010, VLSI TEST S VTS 2010, P194