A cryogenic DAC operating down to 4.2 K

被引：17

作者：

Rahman, M. T. ^{[1
,2
]}

Lehmann, T. ^{[1
]}

机构：

[1] UNSW Australia, Sch Elect Engn & Telecommun, Sydney, NSW 2052, Australia

[2] Stamford Univ Bangladesh, Dept Elect & Elect Engn, Dhaka 1217, Bangladesh

来源：

CRYOGENICS | 2016年 / 75卷

基金：

澳大利亚研究理事会;

关键词：

Quantum bits; Silicon-on-Sapphire; CMOS; Cryogenic DAC; Current steering DAC; SILICON CMOS DEVICES; D/A CONVERTER; TEMPERATURE;

D O I：

10.1016/j.cryogenics.2016.02.003

中图分类号：

O414.1 [热力学];

学科分类号：

摘要：

This paper presents a 10 bit CMOS current steering digital to analog converter (DAC) that operates from room temperature to as low as 4.2 K. It works as the core part of a cryogenic Silicon quantum computer controller circuit producing rapid control gate voltage pulses for quantum bits (qubits) initialization. An improved analog calibration method with a unique unit current cell design is included in the D/A converter structure to overcome the extended cryogenic nonlinear and mismatch effects. The DAC retains its 10 bit linear monotonic behavior over the wide temperature range and it drives a 5052 load to 516 mV with a full scale rise time of 10 ns. The differential non-linearity (DNL) of the converter is 0.35LSB while its average power consumption is 32.18 mW from a 3 V power supply. The complete converter is fabricated using a commercial 0.5 gm 1 poly 3 metal Silicon on Sapphire (SOS) CMOS process. (C) 2016 Elsevier Ltd. All rights reserved.

引用

页码：47 / 55

页数：9

共 29 条

[1] Compact modeling of 0.35 μm SOI CMOS technology node for 4 K DC operation using Verilog-A [J].

Akturk, A. ;

Peckerar, M. ;

Eng, K. ;

Hamlet, J. ;

Potbhare, S. ;

Longoria, E. ;

Young, R. ;

Gurrieri, T. ;

Carroll, M. S. ;

Goldsman, N. .

MICROELECTRONIC ENGINEERING, 2010, 87 (12) :2518-2524

[2] INFLUENCE OF SUBSTRATE FREEZE-OUT ON THE CHARACTERISTICS OF MOS-TRANSISTORS AT VERY LOW-TEMPERATURES [J].

BALESTRA, F ;

AUDAIRE, L ;

LUCAS, C .

SOLID-STATE ELECTRONICS, 1987, 30 (03) :321-327

[3]

Chen Z, 2011, P IEEE INT S CIRC SY, P997

[4] THE PERSPECTIVES OF SILICON-ON-INSULATOR TECHNOLOGIES FOR CRYOGENIC APPLICATIONS [J].

CLAEYS, C ;

SIMOEN, E .

JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1994, 141 (09) :2522-2532

[5] A 1.5-V 14-bit 100-MS/s self-calibrated DAC [J].

Cong, YH ;

Geiger, RL .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (12) :2051-2060

[6]

Das K, 2013, THESIS U NEW S WALES

[7] Sub-Nanoampere One-Shot Single Electron Transistor Readout Electrometry Below 10 Kelvin [J].

Das, Kushal ;

Lehmann, Torsten ;

Dzurak, Andrew S. .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2014, 61 (10) :2816-2824

[8] Effect of deep cryogenic temperature on silicon-on-insulator CMOS mismatch: A circuit designer's perspective [J].

Das, Kushal ;

Lehmann, Torsten .

CRYOGENICS, 2014, 62 :84-93

[9]

Das K, 2010, IEEE INT SYMP CIRC S, P3405, DOI 10.1109/ISCAS.2010.5537861

[10]

EKANAYAKE SR, 2007, P 7 IEEE NANO HONG K, P1283

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