Modelling the dynamic response of on-chip decoupling capacitors

被引：0
|
作者：
Vázquez, JR [1 ]
Meijer, M [1 ]
机构：
[1] Univ Politecn Catalunya, Dept Elect Engn, E-08028 Barcelona, Spain
来源：
SIGNAL PROPAGATION ON INTERCONNECTS, PROCEEDINGS | 2004年
关键词：
D O I：
10.1109/SPI.2004.1408996
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
High-speed digital circuits require increasing amounts of on-chip decoupling capacitors (decaps) to preserve power integrity. There re, proper modelling and analysis of the dynamic response of such decaps in the high frequency range is needed. This paper shows that, in that range, lumped decap models fail and have to be substituted by distributed models. A derivation of such distributed model based on physical grounds is presented and compared with SPICE non-quasi static MOS models.
引用
收藏
页码：39 / 42
页数：4
相关论文
共 50 条
  • [41] ON-CHIP DYNAMIC MECHANICAL MEASUREMENT
    Kirimoto, Atsushi
    Ito, Hiroaki
    Horade, Mitsuhiro
    Takayama, Toshio
    Chimura, Misato
    Ohtani, Tomohito
    Sakata, Yasushi
    Kaneko, Makoto
    2019 IEEE 32ND INTERNATIONAL CONFERENCE ON MICRO ELECTRO MECHANICAL SYSTEMS (MEMS), 2019, : 418 - 421
  • [42] An unique method to fabricate on-chip capacitors for chip-level EMC evaluation
    Chen, Sheng-Yu
    Siao, Vicky
    PROCEEDINGS OF THE 2013 20TH IEEE INTERNATIONAL SYMPOSIUM ON THE PHYSICAL & FAILURE ANALYSIS OF INTEGRATED CIRCUITS (IPFA 2013), 2013, : 366 - 369
  • [43] On-Chip Dynamic Resource Management
    Miele, Antonio
    Kanduri, Anil
    Moazzemi, Kasra
    Juhasz, David
    Rahmani, Amir M.
    Dutt, Nikil
    Liljeberg, Pasi
    Jantsch, Axel
    FOUNDATIONS AND TRENDS IN ELECTRONIC DESIGN AUTOMATION, 2019, 13 (1-2): : 1 - 144
  • [44] Modelling and refinement of an on-chip communication architecture
    Plosila, J
    Liljeberg, P
    Isoaho, J
    FORMAL METHODS AND SOFTWARE ENGINEERING, PROCEEDINGS, 2005, 3785 : 219 - 234
  • [45] Effects of On-Chip Decoupling Capacitors and Silicon Substrate on Power Distribution Networks in TSV-based 3D-ICs
    Kim, Kiyeong
    Pak, Jun So
    Lee, Hyungdong
    Kim, Joungho
    2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2012, : 690 - 697
  • [46] Control of SSO noise through the use of on-chip decoupling cells
    Evans, RJ
    White, DB
    Pomerleau, R
    Scougal, A
    ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2002, : 201 - 204
  • [47] Effects of on-chip decoupling capacitor on switching noise and radiated emission
    Sudo, T
    Nakano, K
    Kudo, J
    Haga, S
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 2003, 42 (10): : 6380 - 6383
  • [48] On-Chip Intra Decoupling Measurements for Integrated Magnetic Thin Film
    Yamaguchi, Masahiro
    Kodate, Wataru
    Endo, Yasushi
    IEEE TRANSACTIONS ON MAGNETICS, 2012, 48 (11) : 4394 - 4397
  • [49] Decoupling Capacitance Boosting for On-Chip Resonant Supply Noise Reduction
    Kim, Jinmyoung
    Nakura, Toru
    Takata, Hidehiro
    Ishibashi, Koichiro
    Ikeda, Makoto
    Asada, Kunihiro
    2011 IEEE 14TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS (DDECS), 2011, : 111 - 114
  • [50] On-Chip Intra Decoupling Measurements for Integrated Magnetic Thin Film
    Kodate, Wataru
    Endo, Yasushi
    Yamaguchi, Masahiro
    2012 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (APEMC), 2012, : 341 - 344
12345