A review of silicon-based wafer bonding processes, an approach to realize the monolithic integration of Si-CMOS and III-V-on-Si wafers

被引:51
作者
Bao, Shuyu [1 ]
Wang Yue [1 ]
Khaw, Lina [1 ]
Zhang Li [1 ]
Wang, Bing [1 ,2 ]
Sasangka, Wardhana Aji [1 ]
Lee, Kenneth Eng Kian [1 ]
Chua, Soo Jin [1 ,3 ]
Michel, Jurgen [1 ,4 ]
Fitzgerald, Eugene [1 ,5 ]
Tan, Chuan Seng [1 ,6 ]
Lee, Kwang Hong [1 ]
机构
[1] Singapore MIT Alliance Res & Technol SMART, Low Energy Elect Syst LEES, Singapore 138602, Singapore
[2] Sun Yat Sen Univ, Sch Elect & Informat Technol, Guangzhou 510006, Peoples R China
[3] Natl Univ Singapore, Dept Elect & Comp Engn, Singapore 117576, Singapore
[4] MIT, Mat Res Labs, Cambridge, MA 02139 USA
[5] MIT, Dept Mat Sci & Engn, Cambridge, MA 02139 USA
[6] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore 639798, Singapore
关键词
material; thin film; integrated circuit; SEMICONDUCTOR; FABRICATION; SUBSTRATE; OPTOELECTRONICS; ENCAPSULATION; DEVICES; LAYERS;
D O I
10.1088/1674-4926/42/2/023106
中图分类号
O469 [凝聚态物理学];
学科分类号
070205 ;
摘要
The heterogeneous integration of III-V devices with Si-CMOS on a common Si platform has shown great promise in the new generations of electrical and optical systems for novel applications, such as HEMT or LED with integrated control circuitry. For heterogeneous integration, direct wafer bonding (DWB) techniques can overcome the materials and thermal mismatch issues by directly bonding dissimilar materials systems and device structures together. In addition, DWB can perform at wafer-level, which eases the requirements for integration alignment and increases the scalability for volume production. In this paper, a brief review of the different bonding technologies is discussed. After that, three main DWB techniques of single-, double- and multi-bonding are presented with the demonstrations of various heterogeneous integration applications. Meanwhile, the integration challenges, such as micro-defects, surface roughness and bonding yield are discussed in detail.
引用
收藏
页数:20
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