Improved a priori interconnect predictions and technology extrapolation in the GTX system

被引:12
作者
Cao, Y [1 ]
Hu, CM
Huang, XJ
Kahng, AB
Markov, IL
Oliver, M
Stroobandt, D
Sylvester, D
机构
[1] Univ Calif Berkeley, Dept Elect Engn & Comp Sci, Berkeley, CA 94720 USA
[2] Univ Calif San Diego, Dept Comp Sci, La Jolla, CA 92093 USA
[3] Univ Michigan, Dept EECS, Ann Arbor, MI 48109 USA
[4] Univ Calif Los Angeles, Dept Comp Sci, Los Angeles, CA 90095 USA
[5] Univ Ghent, RUG ELIS Dept, B-9000 Ghent, Belgium
关键词
a priori interconnect prediction; crosstalk noise; inductance; interconnect delay; system performance models; technology extrapolation; VLSI;
D O I
10.1109/TVLSI.2002.808479
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A priori interconnect prediction and technology extrapolation are closely intertwined. Interconnect predictions are at the core of technology extrapolation models of achievable system power, area density, and speed. Technology extrapolation, in turn, informs a priori interconnect prediction via models of interconnect technology and interconnect optimizations. In this paper, we address the linkage between a priori interconnect prediction and technology extrapolation in two ways. First, we describe how rapid changes in technology, as well as rapid evolution of prediction methods, require a dynamic and flexible framework for technology extrapolation. We then develop a new tool, the GSRC technology extrapolation system (GTX), which allows capture of such knowledge and rapid development of new studies. Second, we identify several "nontraditional" facets of interconnect prediction and quantify their impact on key technology extrapolations. In particular, we explore the effects of interconnect design optimizations such as shield insertion, repeater sizing and repeater staggering, as well as modeling choices for RLC interconnects.
引用
收藏
页码:3 / 14
页数:12
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