Comprehensive Analysis of Gate-Induced Drain Leakage in Vertically Stacked Nanowire FETs: Inversion-Mode Versus Junctionless Mode

被引:72
作者
Hur, Jae [1 ]
Lee, Byung-Hyun [1 ]
Kang, Min-Ho [2 ]
Ahn, Dae-Chul [1 ]
Bang, Tewook [1 ]
Jeon, Seung-Bae [1 ]
Choi, Yang-Kyu [1 ]
机构
[1] Korea Adv Inst Sci & Technol, Sch Elect Engn, Daejeon 34141, South Korea
[2] Natl Nanofab Ctr, Dept Nanoproc, Daejeon 34141, South Korea
关键词
Band-to-band tunneling (BTBT); gate-all-around (GAA); gate-induced drain leakage (GIDL); inversion-mode (IM) FET; junctionless-mode (JM) FET; short-channel effect (SCE); vertically stacked nanowire (VS-NW); TRANSISTORS; FINFET;
D O I
10.1109/LED.2016.2540645
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A comprehensive analysis of the gate-induced drain leakage (GIDL) current of vertically stacked nanowire (VS-NW) FETs was carried out. In particular, two different operational modes of the VS-NW, an inversion mode (IM) and a junctionless mode (JM), were compared. The GIDL current of the JM-FET was considerably smaller than that of the IM-FET, and the reason for the difference was consequently determined by numerical simulations. It was found that the source of the difference between the IM-FET and JM-FET was the difference in source/drain (S/D) doping concentration, where the depletion width becomes the tunneling width, considering a long extension length at the S/D regions. The experimental results showed that the GIDL current of the NW FET was significantly controlled by longitudinal band-to-band tunneling (BTBT), rather than the transverse BTBT, as had been reported in the previous literature.
引用
收藏
页码:541 / 544
页数:4
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