Lockstep Dual-Core ARM A9: Implementation and Resilience Analysis Under Heavy Ion-Induced Soft Errors

被引：42

作者：

de Oliveira, Adria Barros ^{[1
]}

Rodrigues, Gennaro Severino ^{[1
]}

Kastensmidt, Fernanda Lima ^{[1
]}

Added, Nemitala ^{[2
]}

Macchione, Eduardo L. A. ^{[2
]}

Aguiar, Vitor A. P. ^{[2
]}

Medina, Nilberto H. ^{[2
]}

Silveira, Marcilei A. G. ^{[3
]}

机构：

[1] Univ Fed Rio Grande do Sul, Programa Posgrad Microelet, BR-91501970 Porto Alegre, RS, Brazil

[2] Univ Sao Paulo, Inst Fis, BR-05508090 Sao Paulo, Brazil

[3] Ctr Univ FEI, Inst Fis, BR-09850901 Sao Bernardo Do Campo, Brazil

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 2018年 / 65卷 / 08期

关键词：

Embedded processors reliability; fault injection; fault tolerance; heavy ions; lockstep; radiation experiments; soft error; PROCESSOR; MITIGATION;

D O I：

10.1109/TNS.2018.2852606

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a dual-core lockstep (DCLS) implementation to protect hard-core processors against radiation-induced soft errors. The proposed DCLS is applied to an Advanced RISC Machine Cortex-A9 embedded processor. Different software optimizations were evaluated to assess their impact on performance and fault tolerance. Heavy ions' experiments and fault injection emulation were performed to analyze the system susceptibility to errors and the DCLS performance. Results show that the approach is able to decrease the system cross section and achieve high protection against errors. The DCLS successfully protects the system from up to 78% of the injected faults. The execution performance analysis shows that by reducing the number of verifications and augmenting the block partition execution time, it is possible to increase the system reliability with minimal performance losses.

引用

页码：1783 / 1790

页数：8

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