A cost-effective VLSI architecture for high-throughput sequential decoder

被引：0
|
作者：
Lee, CY [1 ]
机构：
[1] NATL CHIAO TUNG UNIV,DEPT ELECT ENGN,HSINCHU 300,TAIWAN
来源：
ISCAS 96: 1996 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - CIRCUITS AND SYSTEMS CONNECTING THE WORLD, VOL 4 | 1996年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
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页码：328 / 331
页数：4
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