A Hardware-Oriented Random Number Generation Method and A Verification System for FPGA

被引：0
作者：
Hori, Sansei [1 ]
Tamukoh, Hakaru [1 ]
机构：
[1] Kyushu Inst Technol, Grad Sch Life Sci & Syst Engn, 2-4 Hibikino, Kitakyushu, Fukuoka 8080196, Japan
来源：
PROCEEDINGS OF THE 2021 INTERNATIONAL CONFERENCE ON ARTIFICIAL LIFE AND ROBOTICS (ICAROB 2021) | 2021年
关键词：
FPGA; Hardware Accelerator; Xillybus; Deep Learning; Random Number Generator; RBM;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
Deep learning technology has made remarkable progress in recent years and has been applied to a variety of applications such as smartphones and cloud servers. These systems employ dedicated processors to save power consumptions and process massive data. In this paper, we introduce a hardware-oriented restricted Boltzmann machine and propose a field-programmable gate array (FPGA) infrastructure for easy verification of user circuits. The infrastructure makes it easy to communicate and control between the host PC and the user circuit.
引用
收藏
页码：12 / 15
页数：4
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