High-performance divider using redundant binary representation

被引:0
|
作者
Wang, G [1 ]
Ozaydin, M [1 ]
Tull, M [1 ]
机构
[1] Univ Oklahoma, Sch Elect & Comp Engn, Norman, OK 73019 USA
来源
2002 45TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I, CONFERENCE PROCEEDINGS | 2002年
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
A high-performance iterative quadratic convergence fixed-point, real and complex number, divider circuit using a previously developed redundant binary inner-product processor core is presented The intermediate quotient coefficients are kept in Redundant Binary (RB) form without converting back to normal binary numbers. A unified multiplier using redundant binary representation for both signed and unsigned numbers is investigated Goldschmidt and Newton-Raphson division methods are compared and the mathematical equivalence of these two methods is provided
引用
收藏
页码:471 / 474
页数:4
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