Reliable Miniature Electronic and Optical Interconnects for Low-Volume Applications

被引:0
|
作者
Clatterbaugh, Guy V. [1 ]
Banda, Charles V.
Lehtonen, S. John [1 ]
机构
[1] Johns Hopkins Univ, Appl Phys Lab, Elect Serv Grp, Laurel, MD 20703 USA
来源
JOHNS HOPKINS APL TECHNICAL DIGEST | 2008年 / 28卷 / 01期
关键词
D O I
暂无
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
At some level, all integrated circuit devices, passive devices, and optoelectronic devices must be interconnected together to function as a highly integrated electronic or optoelectronic system. As silicon-based device technologies have continued to evolve, the number of chip-level and package-level interconnections has increased dramatically while chip sizes have remained relatively constant. This dramatic increase in interconnection density has been enabled through the adoption of area array packages such as ball grid arrays and chip-scale packages. To accommodate these area array packages, today's printed wiring board fabrication techniques are featuring 100-mu m (2-mil) lines and spaces as well as 0.25-mm-diameter (10-mil) blind and buried vias, both of which are necessary for high interconnection densities. Although the technology for wiring chips to packages and packages to boards for high-volume applications is relatively mature, it becomes increasingly ambitious to implement that technology for low-volume electronic applications. The nature of APL's wide range of innovative, miniature electronic development activities necessitates the use of high-density interconnection methods. This article focuses on APL's ongoing activity to develop high-density interconnection methods for use with low-volume, noncommercial electronic applications.
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页码:47 / 57
页数:11
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