Study of a high-barrier-gate pseudomorphic transistor with a step-compositioned channel and bottomside delta-doped sheet structure

被引:2
作者
Lin, KP [1 ]
Yen, CH [1 ]
Chang, WL [1 ]
Yu, KH [1 ]
Lin, KW [1 ]
Liu, WC [1 ]
机构
[1] Natl Cheng Kung Univ, Dept Elect Engn, Tainan 70101, Taiwan
关键词
D O I
10.1088/0268-1242/15/6/328
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A newly designed high-barrier-gate Ga0.51In0.49P/InxGa1-xAs/GaAs pseudomorphic transistor with a step-compositioned channel (SC2) and bottomside delta-doped sheet ((BDS)-S-2) structure has been fabricated successfully and studied. For a 1 x 100 mu m(2) studied device, a high gate-to-drain breakdown voltage over 30 V is found. In addition, an available output current density up to 826 mA mm(-1) at a high gate voltage of 2.5 V, a maximum transconductance of 201 mS mm(-1) with a very broad transconductance operation regime of 3 V of gate bias (565 mA mm(-1) of drain current density) and a high de gain ratio of 575 are obtained, simultaneously. Meanwhile, the maximum values of the unity current-gain cut-off frequency f(T) and oscillation frequency f(max) are 16 and 34 GHz, respectively.
引用
收藏
页码:643 / 647
页数:5
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