The hardware implementation of a genetic algorithm model with FPGA

被引：3
|
作者：
Tu, L [1 ]
Zhu, MC [1 ]
Wang, JX [1 ]
机构：
[1] Shenzhen Univ, EDA Technol Ctr, Shenzhen 518060, Peoples R China
来源：
2002 IEEE INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT), PROCEEDINGS | 2002年
关键词：
genetic algorithm (GA); FPGA; hardware implementation;
D O I：
10.1109/FPT.2002.1188714
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A genetic algorithm (GA) is a robust parallel calculation method based on natural selection, which can be applied to the distributed and concentrated industry optimizing control process. The hardware function of GA operation can be implemented by FPGA. In this paper, a hardware implementation method of GA based on FPGA is presented. The results of this research can be applied to the study and implementation of evolvable hardware (EHW).
引用
收藏
页码：374 / 377
页数：4
相关论文
共 50 条
  • [21] Reconfigurable hardware implementation of K-nearest neighbor algorithm on FPGA
    Yacoub, Mohammed H.
    Ismail, Samar M.
    Said, Lobna A.
    Madian, Ahmed H.
    Radwan, Ahmed G.
    AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2024, 173
  • [22] A Hardware Oriented Approximate Convex Hull Algorithm and its FPGA Implementation
    Mori, Tatsuma
    Manabe, Taito
    Shibata, Yuichiro
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2022, E105A (03) : 459 - 467
  • [23] Hardware implementation of a background substraction algorithm in FPGA-based platforms
    Calvo-Gallego, Elisa
    Sanchez-Solano, Santiago
    Brox Jimenez, Piedad
    2015 IEEE INTERNATIONAL CONFERENCE ON INDUSTRIAL TECHNOLOGY (ICIT), 2015, : 1688 - 1693
  • [24] A novel pipeline based FPGA implementation of a genetic algorithm
    Thirer, Nonel
    MACHINE INTELLIGENCE AND BIO-INSPIRED COMPUTATION: THEORY AND APPLICATIONS VIII, 2014, 9119
  • [25] A FPGA implementation of a self-adaptive genetic algorithm
    Thirer, Nonel
    ARTIFICIAL INTELLIGENCE AND MACHINE LEARNING FOR MULTI-DOMAIN OPERATIONS APPLICATIONS II, 2020, 11413
  • [26] Implementation of a biologically realistic spiking neuron model on FPGA hardware
    Glackin, B
    Maguire, LP
    McGinnity, TM
    Belatreche, A
    Wu, Q
    Proceedings of the 8th Joint Conference on Information Sciences, Vols 1-3, 2005, : 1412 - 1415
  • [27] An Efficient Hardware Implementation of Crystal-Dilithium on FPGA
    Wu, Zixuan
    Chen, Rongmao
    Wang, Yi
    Wang, Qiong
    Peng, Wei
    INFORMATION SECURITY AND PRIVACY, PT II, ACISP 2024, 2024, 14896 : 64 - 83
  • [28] An improved non-uniformity correction algorithm and its hardware implementation on FPGA
    Rong Shenghui
    Zhou Huixin
    Wen Zhigang
    Qin Hanlin
    Qian Kun
    Cheng Kuanhong
    INFRARED PHYSICS & TECHNOLOGY, 2017, 85 : 410 - 420
  • [29] Hardware Implementation of Genetic Algorithm for Epileptic Seizure Detection and Prediction
    Thorbole, Pradip S.
    Kalbhor, Shirish D.
    Harpale, Varsha K.
    Bairagi, V. K.
    2017 INTERNATIONAL CONFERENCE ON COMPUTING, COMMUNICATION, CONTROL AND AUTOMATION (ICCUBEA), 2017,
  • [30] An efficient crossover architecture for hardware parallel implementation of genetic algorithm
    Faraji, Rasoul
    Naji, Hamid Reza
    NEUROCOMPUTING, 2014, 128 : 316 - 327
12345