A VLSI 8x8 MIMO near-ML decoder engine

被引:14
|
作者
Knagge, Geoff [1 ]
Bickerstaff, Mark [2 ]
Ninness, Brett [1 ]
Weller, Steven R. [1 ]
Woodward, Graeme [2 ]
机构
[1] Univ Newcastle, Sch Elect Engn & Comp Sci, Newcastle, NSW 2308, Australia
[2] Agr Syst, N Ryde, Australia
来源
2006 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS DESIGN AND IMPLEMENTATION | 2006年
关键词
D O I
10.1109/SIPS.2006.352614
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Multiple-Input Multiple-Output (MIMO) systems are of significant interest due to their ability to increase the capacity of wireless communications Systems, but for these to be useful they must also be practical for implementation in VLSI circuits. A particularly difficult part of these systems is the decoder, where the optimal maximum-likelihood (ML) solution is desirable, but cannot be directly implemented due to its exponential complexity. The paper presents the first published 8 x 8 MIMO detection engine with an integrated channel preprocessing unit, achieving near-ML BER results at 57.6Mbps, using QPSK in an extended HSDPA application. Other novelties include the high speed sorting mechanism and power saving features.
引用
收藏
页码:387 / 392
页数:6
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