Device simulation of grain boundaries with oxide-silicon interface roughness in laser-crystallized polycrystalline silicon thin-film transistors

被引:12
作者
Kimura, M
Eguchi, T
Inoue, S
Shimoda, T
机构
[1] Seiko Epson Corp, Base Technol Res Ctr, Suwa 3928502, Japan
[2] Seiko Epson Corp, LT Business Dev Ctr, Suwa 3928502, Japan
来源
JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS | 2000年 / 39卷 / 8A期
关键词
device simulation; grain boundary; oxide-silicon interface roughness; laser-crystallization; polycrystalline silicon; thin-film transistor; electric field concentration;
D O I
10.1143/JJAP.39.L775
中图分类号
O59 [应用物理学];
学科分类号
摘要
For laser-crystallized polycrystalline silicon thin-film transistors, the effect of grain boundaries with oxide-silicon interface roughness on the transistor characteristics has been analyzed using device simulation. When grain boundaries and interface roughness are considered simultaneously, degradation of the on-current caused by grain boundaries is reduced by the interface roughness because the electric field concentration increases the carrier density and improves the conductance.
引用
收藏
页码:L775 / L778
页数:4
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