Novel Double-Gate 1T-DRAM Cell Using Nonvolatile Memory Functionality for High-Performance and Highly Scalable Embedded DRAMs

被引:11
作者
Park, Ki-Heung
Park, Cheol Min [1 ]
Kong, Seong Ho [1 ]
Lee, Jong-Ho [2 ,3 ]
机构
[1] Kyungpook Natl Univ, Lab Micro Syst Technol, Taegu 702701, South Korea
[2] Seoul Natl Univ, Sch Elect Engn & Comp Sci, Seoul 151744, South Korea
[3] Seoul Natl Univ, Interuniv Semicond Res Ctr, Seoul 151744, South Korea
关键词
Capacitorless DRAM; double-gate (DG) MOSFET; embedded memory; floating-body effect; nonvolatile; silicon-on-insulator (SOI) MOSFETs; 1T-DRAM;
D O I
10.1109/TED.2009.2038650
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We proposed for the first time a new double-gate 1T-DRAM cell to be applicable to sub-80-nm DRAM technology that has a silicon-oxide-nitride-oxide-silicon type storage node on the back gate ( control gate) for nonvolatile memory (NVM) functionality. An NVM functionality is achieved by Fowler-Nordheim tunneling of electrons into the nitride storage node. Then, holes are accumulated on the back-channel, which makes 1T-DRAM operation in fully depleted silicon-on-insulator (SOI) MOSFETs possible and enhances retention characteristics. We investigated the effect of the NVM functionality on 1T-DRAM performance in nanoscale 1T-DRAM cells through device simulation and verified the effect in 0.6-mu m devices fabricated on SOI wafers.
引用
收藏
页码:614 / 619
页数:6
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