Voltage-mode driver preemphasis technique for on-chip global buses

被引：6

作者：

Zhang, Liang

Wilson, John M.

Bashirullah, Rizwan

Luo, Lei

Xu, Jian

Franzon, Paul D.

机构：

[1] N Carolina State Univ, Dept Elect & Comp Engn, Raleigh, NC 27695 USA

[2] Univ Florida, Dept Elect & Comp Engn, Gainesville, FL 32611 USA

来源：

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | 2007年 / 15卷 / 02期

关键词：

global buses; low-power; on-chip; preemphasis; repeater insertion;

D O I：

10.1109/TVLSI.2007.893588

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper demonstrates that driver preemphasis technique can be used for on-chip global buses to increase signal channel bandwidth. Compared to conventional repeater insertion techniques, driver preemphasis saves repeater layout complexity and reduces power consumption by 12%-39% for data activity factors above 0.1. A driver circuit architecture using voltage-mode preemphasis technique was tested in 0.18-mu m CMOS technology for 10-mm long interconnects at 2 Gb/s.

引用

页码：231 / 236

页数：6

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