Modeling, Control and Experimental Investigation of a Novel DSTATCOM Based on Cascaded H-bridge Multilevel Inverter

被引:0
作者
Xu, Lin [1 ]
Han, Yang [1 ,2 ]
Chen, Chen [1 ]
Pan, Jun-Min [1 ]
Yao, Gang [1 ]
Zhou, Li-Dan [1 ]
Khan, M. M. [1 ]
机构
[1] Shanghai Jiao Tong Univ, Dept Elect Engn, Shanghai 200240, Peoples R China
[2] Univ Elect Sci & Technol China, Sch Mechatron Engn, Chengdu 610054, Peoples R China
关键词
Multilevel; Cascaded H-bridge; DSTATCOM; Phase-locked loop (PLL); Voltage balancing; POWER; SCHEME;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A novel static synchronous compensator for reactive power compensation of distribution system (DSTATCOM) is proposed, based on the cascaded H-bridge multilevel inverter configuration The mathematical formulation of the multilevel DSTATCOM is presented using state-space representations. A new software phase-locked loop (SPLL) is presented for grid synchronization and the obtained phase angle of the fundamental component of the grid voltage is utilized for deriving the active and reactive power balancing equations of the multilevel DSTATCOM The proportional-resonant (PR) controller scheme is adopted for the current tracking control of the Inverter, and the average dc-link voltage is controlled using a proportional-integral (PI) controller to regulate the active power flow of the DSTATCOM. Besides, the voltage balancing (VB) control among individual H-bridges is achieved by using separate PI regulators to control the difference voltage between the individual dc-link voltage and the average voltage The validity of the proposed multilevel DSTATCOM and its control strategies is substantially confirmed by the extensive simulation results and the experimental results from the prototype system
引用
收藏
页码:41 / 54
页数:14
相关论文
共 19 条
[1]  
[Anonymous], 1993, 141 IEEE
[2]  
[Anonymous], 1990, 241 IEEE
[3]   Unified approach for mitigating voltage sag and voltage flicker using the DSTATCOM [J].
Elnady, A ;
Salama, MMA .
IEEE TRANSACTIONS ON POWER DELIVERY, 2005, 20 (02) :992-1000
[4]   Switching characterization of cascaded multilevel-inverter-controlled systems [J].
Gupta, Rajesh ;
Ghosh, Arindam ;
Joshi, Avinash .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2008, 55 (03) :1047-1058
[5]   Control and Experiment of Pulsewidth-Modulated Modular Multilevel Converters [J].
Hagiwara, Makoto ;
Akagi, Hirofumi .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2009, 24 (07) :1737-1746
[6]   A new scheme for power factor correction and active filtering for six-pulse converters loads [J].
Han, Y. ;
Khan, M. M. ;
Xu, L. ;
Yao, G. ;
Zhou, L. ;
Chen, C. .
BULLETIN OF THE POLISH ACADEMY OF SCIENCES-TECHNICAL SCIENCES, 2009, 57 (02) :157-169
[7]  
Han Y, 2008, INT REV ELECTR ENG-I, V3, P629
[8]   A novel harmonic-free power factor corrector based on T-type APF with adaptive linear neural network (ADALINE) control [J].
Han, Yang ;
Khan, Muhammad Mansoor ;
Yao, Gang ;
Zhou, Li-Dan ;
Chen, Chen .
SIMULATION MODELLING PRACTICE AND THEORY, 2008, 16 (09) :1215-1238
[9]   A novel synchronization scheme for grid-connected converters by using adaptive linear optimal filter based PLL (ALOF-PLL) [J].
Han, Yang ;
Xu, Lin ;
Khan, Muhammad Mansoor ;
Yao, Gang ;
Zhou, Li-Dan ;
Chen, Chen .
SIMULATION MODELLING PRACTICE AND THEORY, 2009, 17 (07) :1299-1345
[10]  
Han Y, 2009, PRZ ELEKTROTECHNICZN, V85, P159