SiGe Composition and Thickness Effects on NBTI in Replacement Metal Gate/High-κ Technologies

被引：0

作者：

Srinivasan, P. ^{[1
]}

Fronheiser, J. ^{[1
]}

Akarvardar, K. ^{[1
]}

Kerber, A. ^{[1
]}

Edge, L. F. ^{[2
]}

Southwick, R. G., III ^{[2
]}

Cartier, E. ^{[2
]}

Kothari, H. ^{[3
]}

机构：

[1] Globalfoundries Inc, Santa Clara, CA 90505 USA

[2] IBM Corp, SRDC, Armonk, NY 10504 USA

[3] STMicroelectronics, Geneva, Switzerland

来源：

2014 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM | 2014年

关键词：

NBTI; high-kappa; replacement gate; SiGe; band offsets; DEVICES;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The dependence of NBTI on SiGe thickness and composition for epitaxially grown layers on (100) and (110) Si substrates is studied in detail. It is found that SiGe thickness has no significant impact on NBTI at lower Ge%. However, lower NBTI degradation was observed with increasing Ge%, even though the interface state densities (N-it) increase with respect to Si. This improved NBTI is due to band offset limited V-T, indicating that the improvement is substrate related rather than interface related. The physical mechanism is then discussed in terms of Ge%-induced variation in the band alignment.

引用

页数：6

共 47 条

[21] Channel Thickness Dependence of InGaAs Quantum-Well Field-Effect Transistors With High-κ Gate Dielectrics
Xue, Fei
Jiang, Aiting
Zhao, Han
Chen, Yen-Ting
Wang, Yanzhen
Zhou, Fei
Lee, Jack
IEEE ELECTRON DEVICE LETTERS, 2012, 33 (09) : 1255 - 1257
[22] Flat band voltage control on low Vt metal-gate/high-κ CMOSFETs with small EOT
Chin, Albert
Chang, M. F.
Lin, S. H.
Chen, W. B.
Lee, P. T.
Yeh, F. S.
Liao, C. C.
Li, M. -F.
Su, N. C.
Wang, S. J.
MICROELECTRONIC ENGINEERING, 2009, 86 (7-9) : 1728 - 1732
[23] Probing Defects Generation during Stress in High-κ/Metal Gate FinFETs by Random Telegraph Noise Characterization
Puglisi, Francesco Maria
Costantini, Felipe
Kaczer, Ben
Larcher, Luca
Pavan, Paolo
2016 46TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC), 2016, : 252 - 255
[24] Memory Characteristics of IrOx Metal Nanocrystals Embedded in High-κAl2O3 Films with IrOx Metal Gate
Maikap, S.
Banerjee, W.
Li, W. -C.
Yang, J. -R.
2009 9TH IEEE CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO), 2009, : 378 - 381
[25] Process-induced NBTI-imbalance of high-k/metal-gate deep-submicron CMOS
Wahab, Y. Abdul
Soin, N.
Shahabuddin, S.
Hussin, H.
2014 IEEE INTERNATIONAL CONFERENCE ON SEMICONDUCTOR ELECTRONICS (ICSE), 2014, : 209 - 212
[26] The role of nitrogen on charge-trapping-induced Vth instability in HfAlON high-κ gate dielectric with metal and poly-Si gate electrodes
Yu, Xiongfei
Yu, Mingbin
Zhu, Chunxiang
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2007, 54 (08) : 1972 - 1977
[27] On the parameter extraction of short channel UTBB-FDSOI FET's with high-κ metal gate and TCAD modelling
Trojman, Lionel
Vaca, Andres
Miguel Procel, Luis
PROCEEDINGS OF THE 2018 IEEE 25TH INTERNATIONAL CONFERENCE ON ELECTRONICS, ELECTRICAL ENGINEERING AND COMPUTING (INTERCON 2018), 2018,
[28] Thickness and material dependence of capping layers on flatband voltage (VFB) and equivalent oxide thickness (EOT) with high-k gate dielectric/metal gate stack for gate-first process applications
Choi, Changhwan
MICROELECTRONIC ENGINEERING, 2012, 89 : 34 - 36
[29] Integration of High-κ Dielectrics and Metal Gate on Gate-All-Around Si-Nanowire-Based Architecture for High-Speed Nonvolatile Charge-Trapping Memory
Fu, J.
Singh, Navab
Zhu, Chunxiang
Lo, Guo-Qiang
Kwong, Dim-Lee
IEEE ELECTRON DEVICE LETTERS, 2009, 30 (06) : 662 - 664
[30] High crystalline quality of SiGe fin fabrication with Si-rich composition area using replacement fin processing*
Zan, Ying
Li, Yong-Liang
Cheng, Xiao-Hong
Zhao, Zhi-Qian
Liu, Hao-Yan
Hu, Zhen-Hua
Du, An-Yan
Wang, Wen-Wu
CHINESE PHYSICS B, 2020, 29 (08)

← 1 2 3 4 5 →