Wafer-lever hermetic package with through-wafer interconnects

被引:7
|
作者
Wang, Yu-Chuan [1 ]
Zhu, Da-Peng
Xu, Wei
Le, Luo
机构
[1] Chinese Acad Sci, Shanghai Inst Microsyst & Informat Technol, Shanghai 200050, Peoples R China
[2] Chinese Acad Sci, Grad Sch, Beijing 100039, Peoples R China
关键词
MEMS; wafer-level hermetic packaging; through-wafer via interconnect; MIL-STD;
D O I
10.1007/s11664-006-0016-1
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper reports a new wafer-level hermetic packaging structure with the features of low processing cost and high I/O density by using wet and dry sequentially etched through-wafer vias for the interconnects of a microelectro mechanical systems (MEMS) device. A thin Si wafer cap and wafer-level fabrication processes such as deep reactive ion etching (DRIE) and KOH etching, bottom-up copper filling, and Sn solder bonding were adopted. The hermeticity and bonding strength of the structure are evaluated. Preliminary results show that the hermeticity can meet the requirement of the criterion of MIL-STD 883E, method 1014.9, and the bonding strength is up to 8 MPa.
引用
收藏
页码:105 / 109
页数:5
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