TransPlant: A Parameterized Methodology For Generating Transactional Memory Workloads

被引:0
作者
Poe, James [1 ]
Hughes, Clay [1 ]
Li, Tao [1 ]
机构
[1] Univ Florida, IDEAL, Gainesville, FL 32611 USA
来源
2009 IEEE INTERNATIONAL SYMPOSIUM ON MODELING, ANALYSIS & SIMULATION OF COMPUTER AND TELECOMMUNICATION SYSTEMS (MASCOTS) | 2009年
关键词
Transactional Memory; Workload Synthesis;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Transactional memory provides a means to bridge the discrepancy between programmer productivity and the difficulty in exploiting thread-level parallelism gains offered by emerging chip multiprocessors. Because the hardware has outpaced the software, there are very few modern multithreaded benchmarks available and even fewer for transactional memory researchers. This hurdle must be overcome for transactional memory research to mature and to gain widespread acceptance. Currently, for performance evaluations, most researchers rely on manually converted lock-based multithreaded workloads or the small group of programs written explicitly for transactional memory. Using converted benchmarks is problematic because they have been tuned so well that they may not be representative of how a programmer will actually use transactional memory. Hand coding stressor benchmarks is unattractive because it is tedious and time consuming. A new parameterized methodology that can automatically generate a program based on the desired high-level program characteristics benefits the transactional memory community. In this work, we propose techniques to generate parameterized transactional memory benchmarks based on a feature set, decoupled from the underlying transactional model. Using principle component analysis, clustering, and raw transactional performance metrics, we show that TransPlant can generate benchmarks with features that lie outside the boundary occupied by these traditional benchmarks. We also show how TransPlant can mimic the behavior of SPLASH-2 and STAMP transactional memory workloads. The program generation methods proposed here will help transactional memory architects select a robust set of programs for quick design evaluations.
引用
收藏
页码:548 / 557
页数:10
相关论文
共 33 条
  • [1] [Anonymous], 1984, AM POLIT SCI REV
  • [2] BIENIA C, 2008, P INT S WORKL CHAR
  • [3] CHUNG J, 2006, P INT C HIGH PERF CO
  • [4] Dice D., 2006, Proceedings of the International Symposium on Distributed Computing (DISC), P194, DOI DOI 10.1007/11864219_14
  • [5] EECKHOUT L, 2001, P PAR ARCH COMP TECH
  • [6] EECKHOUT L, 2004, P INT S COMP ARCH
  • [7] Eeckhout Lieven., 2003, Journal of Instruction-Level Parallelism
  • [8] Hammond L., 2004, P INT S COMP ARCH
  • [9] HARRIS T, 2003, P INT C OBJ OR PROGR
  • [10] HUGHES C, 2008, P INT S WORKL CHAR